1. Technical Field
The present invention relates to an ultrasonic measurement apparatus, an ultrasonic imaging apparatus, and an ultrasonic measurement method.
2. Related Art
JP-A-2011-5237 discloses that high speed signal processing is possible by providing a signal conversion unit that converts analog signals into digital signals, an operation unit that performs adaptive signal processing on the digital signals and generates image information, and a data thinning unit that reduces the data volume of the digital signals to be transferred from the signal conversion unit to the operation unit in a measurement apparatus for generating image data of the inside of a subject using analog signals obtained by ultrasonic waves that have propagated through the subject being received by a plurality of ultrasonic conversion elements.
JP-A-2011-217998 discloses an acoustic wave imaging apparatus having a phasing unit that aligns the phases of reception signals of a plurality of acoustic wave receiving elements, a complex signal conversion unit that converts the reception signals with aligned phases into complex signals, a correlation matrix calculation unit that calculates a correlation matrix of the complex signals, and a power calculation unit that calculates a constrained minimum electric power of the reception signals using the correlation matrix and a predetermined constraint vector, in which the correlation matrix calculation unit calculates the correlation matrix at a predetermined cycle and outputs the calculated correlation matrices to the power calculation unit sequentially, and the power calculation unit performs constrained minimum power calculations in parallel using the respective correlation matrices that are input.
The invention disclosed in JP-A-2011-5237 involves thinning the data to speed up the calculation processing by adding together the digital signals of adjacent elements, although there is a problem in that this unavoidably leads to a certain degree of degradation in image quality.
The invention disclosed in JP-A-2011-217998 proposes a method for improving the calculation speed by providing a plurality of storage circuits and calculation circuits and performing operations in parallel, although there is a problem in that circuit size and power consumption increase, and heat generation becomes an issue.